Fujitsu MHU2100AT Bedienungsanleitung

C141-E202-01EN MHU2100AT DISK DRIVE PRODUCT MANUAL

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Interface 5-24 C141-E202-01EN (4) WRITE SECTOR(S) (X’30’ or X’31’) This command writes data of sectors from the address specified in the Device/He

5.3 Host Commands C141-E202-01EN 5-25 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV E

Interface 5-26 C141-E202-01EN (5) WRITE LONG (X’32’ or X’33’) This command operates similarly to the READ SECTOR(S) command except that the device

5.3 Host Commands C141-E202-01EN 5-27 (6) WRITE VERIFY (X’3C’) This command operates similarly to the WRITE SECTOR(S) command except that the devic

Interface 5-28 C141-E202-01EN (7) READ VERIFY SECTOR(S) (X’40’ or X’41’) This command operates similarly to the READ SECTOR(S) command except that

5.3 Host Commands C141-E202-01EN 5-29 (8) SEEK (X’70’ to X’7F’) This command performs a seek operation to the track and selects the head specified

Interface 5-30 C141-E202-01EN (9) EXECUTE DEVICE DIAGNOSTIC (X’90’) This command performs an internal diagnostic test (self-diagnosis) of the devi

5.3 Host Commands C141-E202-01EN 5-31 attention: The device responds to this command with the result of power-on diagnostic test. At command issuanc

Interface 5-32 C141-E202-01EN (10) INITIALIZE DEVICE PARAMETERS (X’91’) The host system can set the number of sectors per track and the maximum he

5.3 Host Commands C141-E202-01EN 5-33 (11) DOWNLOAD MICRO CODE (X’92’) At command issuance (I/O registers setting contents) 1F7h(CM) 1 0 0 1 0 0 1

C141-E202-01EN vii Manual Organization MHU2100AT DISK DRIVE PRODUCT MANUAL (C141-E202) <This manual> • Device Overview • Device Configura

Interface 5-34 C141-E202-01EN Table 5.5 Operation of DOWNLOAD MICRO CODE Host Command Movement of device Subcommand code (FR Reg) Sector count (SN

5.3 Host Commands C141-E202-01EN 5-35 (12) STANDBY IMMEDIATE (X’94’ or X’E0’) Upon receipt of this command, the device sets the BSY bit of the Stat

Interface 5-36 C141-E202-01EN (13) IDLE IMMEDIATE (X’95’ or X’E1’) Upon receipt of this command, the device sets the BSY bit of the Status registe

5.3 Host Commands C141-E202-01EN 5-37 (14) STANDBY (X’96’ or X’E2’) Upon receipt of this command, the device sets the BSY bit of the Status registe

Interface 5-38 C141-E202-01EN (15) IDLE (X’97’ or X’E3’) Upon receipt of this command, the device sets the BSY bit of the Status register, and ent

5.3 Host Commands C141-E202-01EN 5-39 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x x x DV xx 1F5

Interface 5-40 C141-E202-01EN (16) CHECK POWER MODE (X’98’ or X’E5’) The host checks the power mode of the device with this command. The host syst

5.3 Host Commands C141-E202-01EN 5-41 (17) SLEEP (X’99’ or X’E6’) This command is the only way to make the device enter the sleep mode. Upon receip

Interface 5-42 C141-E202-01EN (18) SMART (X’B0) This command predicts the occurrence of device failures depending on the subcommand specified in t

5.3 Host Commands C141-E202-01EN 5-43 Table 5.7 Features Register values (subcommands) and functions (1 of 3) Features Resister Function X’D0’ SMA

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Interface 5-44 C141-E202-01EN Table 5.7 Features Register values (subcommands) and functions (2 of 3) Features Resister Function X’D5’ SMART READ

5.3 Host Commands C141-E202-01EN 5-45 Table 5.7 Features Register values (subcommands) and functions (3 of 3) Features Resister Function X’DA’ SMA

Interface 5-46 C141-E202-01EN At command issuance (I-O registers setting contents) 1F7H(CM) 1 0 1 1 0 0 0 0 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(CL)

5.3 Host Commands C141-E202-01EN 5-47 Table 5.8 Format of device attribute value data Byte Item 00 01 Data format version number 02 Attribute 1 At

Interface 5-48 C141-E202-01EN • Data format version number The data format version number indicates the version number of the data format of the de

5.3 Host Commands C141-E202-01EN 5-49 • Status Flag Bit Meaning 0 If this bit is 1, it indicates normal operations are assured with the attribute

Interface 5-50 C141-E202-01EN Table 5.10 Off-line data collection status Status Byte Meaning 00h or 80h Off-line data acquisition is not execute

5.3 Host Commands C141-E202-01EN 5-51 • Off-line data collection capability Indicates the method of off-line data collection carried out by the driv

Interface 5-52 C141-E202-01EN • Error logging capability Table 5.14 Error logging capability Bit Meaning 0 If this bit is 1, it indicates that t

5.3 Host Commands C141-E202-01EN 5-53 • SMART error logging If the device detects an unrecoverable error during execution of a command received from

C141-E202-01EN ix Contents CHAPTER 1 Device Overview...1-1 1.1 Features ...

Interface 5-54 C141-E202-01EN Table 5.16 Data format of SMART Summary Error Log Byte Item 00 Version of this function 01 Pointer for the latest &

5.3 Host Commands C141-E202-01EN 5-55 • Command data structure Indicates the command received when an error occurs. • Error data structure Indicate

Interface 5-56 C141-E202-01EN • SMART Self-Test The host computer can issue the SMART Execute Off-line Immediate sub-command (FR Register = D4h) an

5.3 Host Commands C141-E202-01EN 5-57 Table 5.19 Selective self-test log data structure Offset Description Initial 00h, 01h Data Structure Revision

Interface 5-58 C141-E202-01EN • Feature Flags Table 5.20 Selective self-test feature flags Bit Description 0 Vendor specific (unused) 1 When set

5.3 Host Commands C141-E202-01EN 5-59 (19) DEVICE CONFIGURATION (X'B1') Individual Device Configuration Overlay feature set commands are

Interface 5-60 C141-E202-01EN • DEVICE CONFIGURATION RESTORE (FR = C0h) The DEVICE CONFIGURATION RESTORE command disables any setting previously m

5.3 Host Commands C141-E202-01EN 5-61 bit. After execution of this command, the settings are kept for the device power down or reset. If the restric

Interface 5-62 C141-E202-01EN Table 5.21 DEVICE CONFIGURATION IDENTIFY data structure Word Value Content 0 X'0001' Data structure revi

5.3 Host Commands C141-E202-01EN 5-63 (20) READ MULTIPLE (X’C4’) The READ MULTIPLE Command performs the same as the READ SECTOR(S) Command except t

Contents x C141-E202-01EN CHAPTER 3 Installation Conditions ... 3-1 3.1 Dimensions...

Interface 5-64 C141-E202-01EN At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 0 0 0 1 0 0 1F6H(DH) x L x DV Start head No. /

5.3 Host Commands C141-E202-01EN 5-65 (21) WRITE MULTIPLE (X’C5’) This command is similar to the WRITE SECTOR(S) command. The device does not gener

Interface 5-66 C141-E202-01EN At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head

5.3 Host Commands C141-E202-01EN 5-67 (22) SET MULTIPLE MODE (X’C6’) This command enables the device to perform the READ MULTIPLE and WRITE MULTIPL

Interface 5-68 C141-E202-01EN At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x x x DV xx 1F5H(CH) 1

5.3 Host Commands C141-E202-01EN 5-69 (23) READ DMA (X’C8’ or X’C9’) This command operates similarly to the READ SECTOR(S) command except for follo

Interface 5-70 C141-E202-01EN At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head

5.3 Host Commands C141-E202-01EN 5-71 (24) WRITE DMA (X’CA’ or X’CB’) This command operates similarly to the WRITE SECTOR(S) command except for fol

Interface 5-72 C141-E202-01EN At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x DV End head

5.3 Host Commands C141-E202-01EN 5-73 (25) READ BUFFER (X’E4’) The host system can read the current contents of the data buffer of the device by is

Contents C141-E202-01EN xi 4.6.2 Write circuit...4-9 4.6.

Interface 5-74 C141-E202-01EN (26) FLUSH CACHE (X’E7’) This command is used to order to write every write cache data stored by the device into the

5.3 Host Commands C141-E202-01EN 5-75 (27) WRITE BUFFER (X’E8’) The host system can overwrite the contents of the data buffer of the device with a

Interface 5-76 C141-E202-01EN (28) IDENTIFY DEVICE (X’EC’) The host system issues the IDENTIFY DEVICE command to read parameter information from t

5.3 Host Commands C141-E202-01EN 5-77 (29) IDENTIFY DEVICE DMA (X’EE’) When this command is not used to transfer data to the host in DMA mode, this

Interface 5-78 C141-E202-01EN Table 5.22 Information to be read by IDENTIFY DEVICE command (1 of 2) Word Value Description 0 X’045A’ General Con

5.3 Host Commands C141-E202-01EN 5-79 Table 5.22 Information to be read by IDENTIFY DEVICE command (2 of 2) Word Value Description 66 X’0078’ Man

Interface 5-80 C141-E202-01EN Bit 14-8: Undefined Bit 7: Removable disk drive = 1 Bit 6: Fixed drive = 1 Bit 5-3: Undefined Bit 2: IDENTIFY DEV

5.3 Host Commands C141-E202-01EN 5-81 *5 Word 50: Device capability Bit 15: 0 Bit 14: 1 Bit 13 to 1 Reserved Bit 0 Standby timer value '1&a

Interface 5-82 C141-E202-01EN *10 Word 64: Advance PIO transfer mode support status Bit 15-8: Reserved Bit 7-0: Advance PIO transfer mode Bit 1:

5.3 Host Commands C141-E202-01EN 5-83 *13 WORD 83 Bit 15: = 0 Bit 14: = 1 Bit 13: * '1' = FLUSH CACHE EXT command supported. Bit 12: &a

Contents xii C141-E202-01EN (13) IDLE IMMEDIATE (X’95’ or X’E1’)...5-36 (14) STANDBY (X’96’ or X’E2’) ...

Interface 5-84 C141-E202-01EN *15 WORD 85 Bit 15: Undefined. Bit 14: '1' = Supports the NOP command. Bit 13: '1' = Supports t

5.3 Host Commands C141-E202-01EN 5-85 *17 WORD 87 Bits 15: = '0' Bits 14: = '1' Bits 13-2: Reserved Bit 1-0: Same definition

Interface 5-86 C141-E202-01EN Bit 10, 9: Method for deciding the device No. of Device 1. '00' = Reserved '01' = Using a jumper.

5.3 Host Commands C141-E202-01EN 5-87 *23 WORD 128 Bit 15-9: Reserved Bit 8: Security level. 0: High, 1: Maximum Bit 7-6: Reserved Bit 5: &apo

Interface 5-88 C141-E202-01EN (30) SET FEATURES (X’EF’) The host system issues the SET FEATURES command to set parameters in the Features register

5.3 Host Commands C141-E202-01EN 5-89 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 0 1 1 1 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F

Interface 5-90 C141-E202-01EN Multiword DMA transfer mode X 00100 000 (X’20’: Mode 0) 00100 001 (X’21’: Mode 1) 00100 010 (X’22’: Mode 2)

5.3 Host Commands C141-E202-01EN 5-91 *3) Automatic Acoustic Management (AAM) The host writes to the Sector Count register with the requested acoust

Interface 5-92 C141-E202-01EN (31) SECURITY SET PASSWORD (X’F1’) This command enables a user password or master password to be set. The host trans

5.3 Host Commands C141-E202-01EN 5-93 At command issuance (I-O register contents) 1F7h(CM) 1 1 1 1 0 0 0 1 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL)

Contents C141-E202-01EN xiii (46) SET MAX ADDRESS EXT (X’37’): Option (customizing)...

Interface 5-94 C141-E202-01EN (32) SECURITY UNLOCK(X’F2’) This command cancels LOCKED MODE. The host transfers the 512-byte data shown in Table 5.

5.3 Host Commands C141-E202-01EN 5-95 At command completion (I-O register contents) 1F7h(ST) Status information 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(

Interface 5-96 C141-E202-01EN (33) SECURITY ERASE PREPARE (X’F3’) The SECURITY ERASE UNIT command feature is enabled by issuing the SECURITY ERASE

5.3 Host Commands C141-E202-01EN 5-97 (34) SECURITY ERASE UNIT (X’F4’) This command erases all user data. This command also invalidates the user p

Interface 5-98 C141-E202-01EN (35) SECURITY FREEZE LOCK (X’F5’) This command puts the device into FROZEN MODE. The following commands used to cha

5.3 Host Commands C141-E202-01EN 5-99 At command issuance (I-O register contents) 1F7h(CM) 1 1 1 1 0 1 0 1 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h(CL) 1F

Interface 5-100 C141-E202-01EN (36) SECURITY DISABLE PASSWORD (X’F6’) This command invalidates the user password already set and releases the lock

5.3 Host Commands C141-E202-01EN 5-101 At command completion (I-O register contents) 1F7h(ST) Status information 1F6h(DH) x x x DV xx 1F5h(CH) 1F4h

Interface 5-102 C141-E202-01EN (37) READ NATIVE MAX ADDRESS (X’F8’) This command posts the maximum address intrinsic to the device, which can be s

5.3 Host Commands C141-E202-01EN 5-103 (38) SET MAX (X’F9’) SET MAX Features Register Values Value Command 00h Obsolete 01h SET MAX SET PASSWORD

Contents xiv C141-E202-01EN 5.6.3.1 Initiating an Ultra DMA data in burst... 5-148 5.6.3.2 Ultra DMA data burst

Interface 5-104 C141-E202-01EN At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x L x DV Max head/LBA [MSB] 1

5.3 Host Commands C141-E202-01EN 5-105 At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) 1F5H(CH) 1F4H(

Interface 5-106 C141-E202-01EN At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(CL)

5.3 Host Commands C141-E202-01EN 5-107 At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1

Interface 5-108 C141-E202-01EN At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 1 1F6H(DH) x x x DV xx 1F5H(CH) 1F4H(CL)

5.3 Host Commands C141-E202-01EN 5-109 (39) READ SECTOR(S) EXT (X’24’): Option (customizing) • Description This command is the extended command o

Interface 5-110 C141-E202-01EN (40) READ DMA EXT (X’25’): Option (customizing) • Description This command is the extended command of the READ DM

5.3 Host Commands C141-E202-01EN 5-111 (41) READ NATIVE MAX ADDRESS EXT (X’27’): Option (customizing) • Description This command is used to assig

Interface 5-112 C141-E202-01EN (42) READ MULTIPLE EXT (X’29’): Option (customizing) • Description This command is the extended command of the RE

5.3 Host Commands C141-E202-01EN 5-113 (43) READ LOG EXT (X'2F') [Optional command (Customize)] • Description This command reads data fro

Contents C141-E202-01EN xv 6.4.3.1 Miss-hit ...6-15 6.4.3.2 Seq

Interface 5-114 C141-E202-01EN Log address: Log number of the log to be read Sector offset: First log sector subject to the data transfer Sector co

5.3 Host Commands C141-E202-01EN 5-115 (44) WRITE SECTOR(S) EXT (X’34’): Option (customizing) • Description This command is the extended command

Interface 5-116 C141-E202-01EN (45) WRITE DMA EXT (X’35’): Option (customizing) • Description This command is the extended command of the WRITE

5.3 Host Commands C141-E202-01EN 5-117 (46) SET MAX ADDRESS EXT (X’37’): Option (customizing) • Description This command limits specifications so

Interface 5-118 C141-E202-01EN At command issuance (I/O registers setting contents) 1F7h(CM) 0 0 1 1 0 1 1 1 1F6h(DH) 1 L 1 DV xx 1F5h(CH) P 1F5h(

5.3 Host Commands C141-E202-01EN 5-119 (47) WRITE MULTIPLE EXT (X’39’): Option (customizing) • Description This command is the extended command o

Interface 5-120 C141-E202-01EN (48) WRITE LOG EXT (X’3F’) [Optional command (Customize)] • Description This command writes data to the general-pu

5.3 Host Commands C141-E202-01EN 5-121 Log address: Log number of the log to be written Sector offset: First log sector subject to the data transfe

Interface 5-122 C141-E202-01EN (49) READ VERIFY SECTOR(S) EXT (X’42): Option (customizing) • Description This command is the extended command of

5.3 Host Commands C141-E202-01EN 5-123 (50) FLUSH CACHE EXT (X’EA’): Option (customizing) • Description This command executes the same operation

FOR SAFE OPERATION Handling of This Manual This manual contains important information for using this product. Read thoroughly before using the produc

Contents xvi C141-E202-01EN Illustrations Figures Figure 1.1 Negative voltage at +5 V when power is turned off ... 1-6 Figure

Interface 5-124 C141-E202-01EN 5.3.3 Error posting Table 5.27 lists the defined errors that are valid for each command. Table 5.27 Command code an

5.3 Host Commands C141-E202-01EN 5-125 Table 5.27 Command code and parameters (2 of 2) Error Register (X '1F1') Status Register (X &apos

Interface 5-126 C141-E202-01EN 5.4 Command Protocol The host should confirm that the BSY bit of the Status register of the device is 0 prior to iss

5.4 Command Protocol C141-E202-01EN 5-127 f) The drive clears DRQ bit to 0. If transfer of another sector is requested, the device sets the BSY bit

Interface 5-128 C141-E202-01EN IMPORTANT For transfer of a sector of data, the host needs to read Status register (X’1F7’) in order to clear INTRQ (

5.4 Command Protocol C141-E202-01EN 5-129 5.4.2 PIO Data transferring commands from host to device The execution of the following commands involves

Interface 5-130 C141-E202-01EN 40 ms Figure 5.5 WRITE SECTOR(S) command protocol IMPORTANT For transfer of a sector of data, the host needs to read

5.4 Command Protocol C141-E202-01EN 5-131 5.4.3 Commands without data transfer Execution of the following commands does not involve data transfer be

Interface 5-132 C141-E202-01EN Figure 5.6 Protocol for the command execution without data transfer 5.4.4 Other commands • READ MULTIPLE (EXT) •

5.4 Command Protocol C141-E202-01EN 5-133 f) When the command execution is completed, the device clears both BSY and DRQ bits and asserts the INTRQ

Contents C141-E202-01EN xvii Figure 5.2 Execution example of READ MULTIPLE command...5-63 Figure 5.3 Read Sector(s) command prot

Interface 5-134 C141-E202-01EN 5.5 Ultra DMA Feature Set 5.5.1 Overview Ultra DMA is a data transfer protocol used with the READ DMA and WRITE DMA

5.5 Ultra DMA Feature Set C141-E202-01EN 5-135 Both the host and device perform a CRC function during an Ultra DMA burst. At the end of an Ultra DMA

Interface 5-136 C141-E202-01EN 7) The host shall release DD (15:0) within tAZ after asserting DMACK-. 8) The device may assert DSTROBE tZIORDY aft

5.5 Ultra DMA Feature Set C141-E202-01EN 5-137 2) The device shall pause an Ultra DMA burst by not generating DSTROBE edges. NOTE - The host shall n

Interface 5-138 C141-E202-01EN 6) The host shall drive DD (15:0) no sooner than tZAH after the device has negated DMARQ. For this step, the host m

5.5 Ultra DMA Feature Set C141-E202-01EN 5-139 4) If the host negates HDMARDY- within tSR after the device has generated a DSTROBE edge, then the ho

Interface 5-140 C141-E202-01EN 5.5.4 Ultra DMA data out commands 5.5.4.1 Initiating an Ultra DMA data out burst The following steps shall occur in

5.5 Ultra DMA Feature Set C141-E202-01EN 5-141 5.5.4.2 The data out transfer The following steps shall occur in the order they are listed unless oth

Interface 5-142 C141-E202-01EN 5.5.4.4 Terminating an Ultra DMA data out burst a) Host terminating an Ultra DMA data out burst The following stops

5.5 Ultra DMA Feature Set C141-E202-01EN 5-143 b) Device terminating an Ultra DMA data out burst The following steps shall occur in the order they a

Contents xviii C141-E202-01EN Tables Table 1.1 Specifications ... 1

Interface 5-144 C141-E202-01EN 13) The host shall neither negate STOP nor HSTROBE until at least tACK after negating DMACK-. 14) The host shall no

5.5 Ultra DMA Feature Set C141-E202-01EN 5-145 i) The CRC generator polynomial is : G (X) = X16 + X12 + X5 + 1. Note: Since no bit clock is availa

Interface 5-146 C141-E202-01EN 5.6 Timing 5.6.1 PIO data transfer Figure 5.9 shows of the data transfer timing between the device and the host sys

5.6 Timing C141-E202-01EN 5-147 5.6.2 Multiword data transfer Figure 5.10 shows the multiword DMA data transfer timing between the device and the ho

Interface 5-148 C141-E202-01EN 5.6.3 Ultra DMA data transfer Figures 5.11 through 5.20 define the timings associated with all phases of Ultra DMA b

5.6 Timing C141-E202-01EN 5-149 5.6.3.2 Ultra DMA data burst timing requirements Table 5.29 Ultra DMA data burst timing requirements (1 of 2) NAME

Interface 5-150 C141-E202-01EN Table 5.29 Ultra DMA data burst timing requirements (2 of 2) MODE 0 (in ns) MODE 1 (in ns) MODE 2 (in ns) MODE 3 (in

5.6 Timing C141-E202-01EN 5-151 Table 5.30 Ultra DMA sender and recipient timing requirements MODE 0 (in ns) MODE 1 (in ns) MODE 2 (in ns) MODE 3 (

Interface 5-152 C141-E202-01EN 5.6.3.3 Sustained Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Mode

5.6 Timing C141-E202-01EN 5-153 5.6.3.4 Host pausing an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DM

Contents C141-E202-01EN xix Table 5.25 Relationship between combination of Identifier and Security level, and operation of the lock function...

Interface 5-154 C141-E202-01EN 5.6.3.5 Device terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ul

5.6 Timing C141-E202-01EN 5-155 5.6.3.6 Host terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultr

Interface 5-156 C141-E202-01EN 5.6.3.7 Initiating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA

5.6 Timing C141-E202-01EN 5-157 5.6.3.8 Sustained Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Mod

Interface 5-158 C141-E202-01EN 5.6.3.9 Device pausing an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra

5.6 Timing C141-E202-01EN 5-159 5.6.3.10 Host terminating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ul

Interface 5-160 C141-E202-01EN 5.6.3.11 Device terminating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the

5.6 Timing C141-E202-01EN 5-161 5.6.4 Power-on and reset Figure 5.21 shows power-on and reset (hardware and software reset) timing. (1) Only master

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C141-E202-01EN 6-1 CHAPTER 6 Operations 6.1 Device Response to the Reset 6.2 Power Save 6.3 Defect Processing 6.4 Read-ahead Cache 6.5 Write Cache

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Operations 6-2 C141-E202-01EN 6.1 Device Response to the Reset This section describes how the PDIAG- and DASP- signals responds when the power of t

6.1 Device Response to the Reset C141-E202-01EN 6-3 Max. 31 sec.Max. 450 ms.Max. 30 sec.Max. 1 ms.If presence of a slave device isconfirmed, PDIAG-

Operations 6-4 C141-E202-01EN After the slave device receives the hardware reset, the slave device shall report its presence and the result of the s

6.1 Device Response to the Reset C141-E202-01EN 6-5 6.1.3 Response to software reset The master device does not check the DASP- signal for a softwar

Operations 6-6 C141-E202-01EN 6.1.4 Response to diagnostic command When the master device receives an EXECUTE DEVICE DIAGNOSTIC command and the sla

6.2 Power Save C141-E202-01EN 6-7 6.2 Power Save The host can change the power consumption state of the device by issuing a power command to the dev

Operations 6-8 C141-E202-01EN • Upon receipt of a hard reset • Upon receipt of Idle/Idle Intermediate (4) Standby mode In this mode, the spindle m

6.3 Defect Processing C141-E202-01EN 6-9 6.2.2 Power commands The following commands are available as power commands. • IDLE • IDLE IMMEDIATE • S

Operations 6-10 C141-E202-01EN 6.3.2 Alternating processing for defective sectors The following two types of technology are used for alternating pr

6.3 Defect Processing C141-E202-01EN 6-11 (3) Automatic alternating processing This technology assigns a defective sector to a spare sector of an sp

C141-E202-01EN 1-1 CHAPTER 1 Device Overview 1.1 Features 1.2 Device Specifications 1.3 Power Requirements 1.4 Environmental Specifications 1.5 Acou

Operations 6-12 C141-E202-01EN 6.4 Read-ahead Cache Read-ahead Cache is the function for automatically reading data blocks upon completion of the r

6.4 Read-ahead Cache C141-E202-01EN 6-13 6.4.2 Caching operation The caching operation is performed only when the commands listed below are received

Operations 6-14 C141-E202-01EN 1)-1 Any command other than the following commands is issued. (All caching-target data is invalidated.) RECALIBRATE R

6.4 Read-ahead Cache C141-E202-01EN 6-15 6.4.3 Using the read segment buffer Methods of using the read segment buffer are explained for following si

Operations 6-16 C141-E202-01EN 6.4.3.2 Sequential Hit When the read command that is targeted at a sequential address is received after execution of

6.4 Read-ahead Cache C141-E202-01EN 6-17 6.4.3.3 Full hit In this situation, all read requested data is stored in the data buffer. Transfer of the

Operations 6-18 C141-E202-01EN 6.4.3.4 Partial hit In this situation, a part of read requested data including the top sector is stored in the data

6.5 Write Cache C141-E202-01EN 6-19 6.5 Write Cache Write Cache is the function for reducing the command processing time by separating command contr

Operations 6-20 C141-E202-01EN (3) Status report in the event of an error The status report concerning an error occurring during writing onto media

6.5 Write Cache C141-E202-01EN 6-21 IMPORTANT If Write Cache is enabled, there is a possibility that data transferred from the host with the Write Ca

Device Overview 1-2 C141-E202-01EN 1.1 Features 1.1.1 Functions and performance The following features of the disk drive is described. (1) Compact

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C141-E202-01EN GL-1 Glossary Actuator Head positioning assembly. The actuator consists of a voice coil motor and head arm. If positions the read-

Glossary GL-2 C141-E202-01EN MTBF Mean time between failures. The MTBF is calculated by dividing the total operation time (total power-on time) by

Glossary C141-E202-01EN GL-3 Status The status is a piece of one-byte information posted from the drive to the host when command execution is ended.

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C141-E202-01EN AB-1 Acronyms and Abbreviations A ABRT Aborted command AIC Automatic idle control AMNF Address mark not found ATA AT attachment AW

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C141-E202-01EN IN-1 Index 1 drive connection...2-3 2 drives configuration...2-4 2 drive

Index IN-2 C141-E202-01EN data that is a target of caching ...6-13 data transfer mode...5-89 data-sur

Fujitsu Internal Use Only Index C141-E202-01EN IN-3 I I/O register...5-7 IDENTIFY DEVICE...

1.1 Features C141-E202-01EN 1-3 1.1.3 Interface (1) Connection to ATA interface The disk drive has built-in controllers compatible with the ATA i

Index IN-4 C141-E202-01EN R raw attribute value...5-49 READ BUFFER ...5-73 read c

Fujitsu Internal Use Only Index C141-E202-01EN IN-5 STANDBY command ...6-8 STANDBY IMMEDIATE ...5-35, 6-9 STAN

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C141-E202-01EN Comment Form We would appreciate your comments and suggestions regarding this manual. Manual code C141-E202-01EN Manual name MHU2

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MHU2100AT DISK DRIVE PRODUCT MANUAL C141-E202-01EN MHU2100AT DISK DRIVE PRODUCT MANUAL C141-E202-01EN

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Device Overview 1-4 C141-E202-01EN 1.2 Device Specifications 1.2.1 Specifications summary Table 1.1 shows the specifications of the disk drives. T

1.2 Device Specifications C141-E202-01EN 1-5 Table 1.1 lists the formatted capacity, number of logical cylinders, number of heads, and number of

C141-E202-01EN Revision History (1/1) Edition Date Revised section (*1) (Added/Deleted/Altered) Details 01 2004-01-20 *1 Section(s)

Device Overview 1-6 C141-E202-01EN 1.3 Power Requirements (1) Input Voltage • + 5 V ± 5 % (2) Ripple +5 V Maximum 100 mV (peak to peak) Fre

1.3 Power Requirements C141-E202-01EN 1-7 (4) Current Requirements and Power Dissipation Table 1.3 lists the current and power dissipation (typica

Device Overview 1-8 C141-E202-01EN (5) Current fluctuation (Typ.) at +5 V when power is turned on Figure 1.2 Current fluctuation (Typ.) at +5 V w

1.5 Acoustic Noise C141-E202-01EN 1-9 1.5 Acoustic Noise Table 1.5 lists the acoustic noise specification. Table 1.5 Acoustic noise specification

Device Overview 1-10 C141-E202-01EN 1.7 Reliability (1) Mean time between failures (MTBF) Conditions of 300,000 h Power-on time 250H/month or le

1.8 Error Rate C141-E202-01EN 1-11 1.8 Error Rate Known defects, for which alternative blocks can be assigned, are not included in the error rate

Device Overview 1-12 C141-E202-01EN Emergency Unload other than Normal Unload is performed when the power is shut down while the heads are still loa

1.11 Advanced Power Management C141-E202-01EN 1-13 Standby: The spindle motor stops. In APM Mode-1, which is the APM default mode, the operation

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C141-E202-01EN 2-1 CHAPTER 2 Device Configuration 2.1 Device Configuration 2.2 System Configuration This chapter describes the internal configu

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Device Configuration 2-2 C141-E202-01EN 2.1 Device Configuration Figure 2.1 shows the disk drive. The disk drive consists of a disk enclosure (DE),

2.2 System Configuration C141-E202-01EN 2-3 (6) Read/write circuit The read/write circuit uses a LSI chip for the read/write preamplifier. It impro

Device Configuration 2-4 C141-E202-01EN 2.2.3 2 drives connection MHC2032ATMHC2040ATMHC2032ATMHC2040AT(Host adaptor) Note: When the drive that is

C141-E202-01EN 3-1 CHAPTER 3 Installation Conditions 3.1 Dimensions 3.2 Mounting 3.3 Cable Connections 3.4 Jumper Settings This chapter gives th

Installation Conditions 3-2 C141-E202-01EN 3.1 Dimensions Figure 3.1 illustrates the dimensions of the disk drive and positions of the mounting scr

3.2 Mounting C141-E202-01EN 3-3 3.2 Mounting For information on mounting, see the "FUJITSU 2.5-INCH HDD INTEGRATION GUIDANCE (C141-E144)."

Installation Conditions 3-4 C141-E202-01EN (2) Frame The MR head bias of the HDD disk enclosure (DE) is zero. The mounting frame is connected to SG

3.2 Mounting C141-E202-01EN 3-5 IMPORTANT Because of breather hole mounted to the HDD, do not allow this to close during mounting. Locating of breath

Installation Conditions 3-6 C141-E202-01EN (4) Ambient temperature The temperature conditions for a disk drive mounted in a cabinet refer to the amb

3.2 Mounting C141-E202-01EN 3-7 (5) Service area Figure 3.6 shows how the drive must be accessed (service areas) during and after installation. Fi

C141-E202-01EN i Preface This manual describes MHU2100AT model of the MHU Series, 2.5-inch hard disk drives. These drives have a built-in controlle

Installation Conditions 3-8 C141-E202-01EN - General notes Figure 3.7 Handling cautions - Installation (1) Please use the driver of a

3.3 Cable Connections C141-E202-01EN 3-9 3.3 Cable Connections 3.3.1 Device connector The disk drive has the connectors and terminals listed below

Installation Conditions 3-10 C141-E202-01EN 3.3.2 Cable connector specifications Table 3.2 lists the recommended specifications for the cable conne

3.4 Jumper Settings C141-E202-01EN 3-11 3.3.4 Power supply connector (CN1) Figure 3.10 shows the pin assignment of the power supply connector (CN1)

Installation Conditions 3-12 C141-E202-01EN 3.4.2 Factory default setting Figure 3.12 shows the default setting position at the factory. Figure 3.

3.4 Jumper Settings C141-E202-01EN 3-13 3.4.4 CSEL setting Figure 3.14 shows the cable select (CSEL) setting. ShortOpenBD2AC1 Note: The CSEL setti

Installation Conditions 3-14 C141-E202-01EN Figure 3.16 Example (2) of Cable Select 3.4.5 Power Up in Standby setting When pin C is grounded, th

C141-E202-01EN 4-1 CHAPTER 4 Theory of Device Operation 4.1 Outline 4.2 Subassemblies 4.3 Circuit Configuration 4.4 Power-on Sequence 4.5 Self-calib

Theory of Device Operation 4-2 C141-E202-01EN 4.1 Outline This chapter consists of two parts. First part (Section 4.2) explains mechanical assembl

4.3 Circuit Configuration C141-E202-01EN 4-3 4.2.4 Air filter There are two types of air filters: a breather filter and a circulation filter. The b

Preface ii C141-E202-01EN Conventions for Alert Messages This manual uses the following conventions to show the alert messages. An alert message co

Theory of Device Operation 4-4 C141-E202-01EN (4) Controller circuit Major functions are listed below. • ATA interface control and data transfer co

4.3 Circuit Configuration C141-E202-01EN 4-5 MCU & HDC & RDC (88i5531; Marvell) HDC MCU RDC Data Buffer SDRAM Flash ROM FROM SVC TLS2255 Re

Theory of Device Operation 4-6 C141-E202-01EN 4.4 Power-on Sequence Figure 4.3 describes the operation sequence of the disk drive at power-on. The

4.5 Self-calibration C141-E202-01EN 4-7 4.5 Self-calibration The disk drive occasionally performs self-calibration in order to sense and calibrate m

Theory of Device Operation 4-8 C141-E202-01EN 4.5.2 Execution timing of self-calibration Self-calibration is performed once when power is turned on

4.6 Read/write Circuit C141-E202-01EN 4-9 4.6 Read/write Circuit The read/write circuit consists of the read/write preamplifier (PreAMP), the write

Theory of Device Operation 4-10 C141-E202-01EN 4.6.3 Read circuit The head read signal from the PreAMP is regulated by the automatic gain control (

4.6 Read/write Circuit C141-E202-01EN 4-11 (3) FIR circuit This circuit is 10-tap sampled analog transversal filter circuit that equalizes the head r

Theory of Device Operation 4-12 C141-E202-01EN 4.7 Servo Control The actuator motor and the spindle motor are submitted to servo control. The actu

4.7 Servo Control C141-E202-01EN 4-13 (1) Microprocessor unit (MPU) The MPU executes startup of the spindle motor, movement to the reference cylind

Preface C141-E202-01EN iii Attention Please forward any comments you may have regarding this manual. To make this manual easier for users to underst

Theory of Device Operation 4-14 C141-E202-01EN (5) Spindle motor control circuit The spindle motor control circuit controls the sensor-less spindle

4.7 Servo Control C141-E202-01EN 4-15 4.7.2 Data-surface servo format Figure 4.7 describes the physical layout of the servo frame. The three areas

Theory of Device Operation 4-16 C141-E202-01EN Figure 4.7 Physical sector servo configuration on disk surface W/R Recovery

4.7 Servo Control C141-E202-01EN 4-17 4.7.3 Servo frame format As the servo information, the IDD uses the two-phase servo generated from the gray co

Theory of Device Operation 4-18 C141-E202-01EN 4.7.4 Actuator motor control The voice coil motor (VCM) is controlled by feeding back the servo data

4.7 Servo Control C141-E202-01EN 4-19 4.7.5 Spindle motor control Hall-less three-phase twelve-pole motor is used for the spindle motor, and the 3-p

Theory of Device Operation 4-20 C141-E202-01EN pump for 0.714 ms × k (k: constant value). This makes the flowed current into the motor higher and t

C141-E202-01EN 5-1 CHAPTER 5 Interface 5.1 Physical Interface 5.2 Logical Interface 5.3 Host Commands 5.4 Command Protocol 5.5 Ultra DMA Feature Set

Interface 5-2 C141-E202-01EN 5.1 Physical Interface 5.1.1 Interface signals Figure 5.1 shows the interface signals.

5.1 Physical Interface C141-E202-01EN 5-3 5.1.2 Signal assignment on the connector Table 5.1 shows the signal assignment on the interface connector.

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Interface 5-4 C141-E202-01EN [signal] [I/O] [Description] ENCSEL I This signal is used to set master/slave using the CSEL signal (pin 28). Pins

5.1 Physical Interface C141-E202-01EN 5-5 [signal] [I/O] [Description] CS0- I Chip select signal decoded from the host address bus. This signal i

Interface 5-6 C141-E202-01EN [signal] [I/O] [Description] DMARQ O This signal is used for DMA transfer between the host system and the device.

5.2 Logical Interface C141-E202-01EN 5-7 5.2.1 I/O registers Communication between the host system and the device is done through input-output (I/O)

Interface 5-8 C141-E202-01EN Device/Head, Cylinder High, Cylinder Low, Sector Number registers indicate LBA bits 27 to 24, bits 23 to 16, bits 15 to

5.2 Logical Interface C141-E202-01EN 5-9 - Bit 1: Track 0 Not Found (TK0NF). This bit indicates that track 0 was not found during RECALIBRATE comm

Interface 5-10 C141-E202-01EN (5) Sector Number register (X’1F3’) The contents of this register indicates the starting sector number for the subse

5.2 Logical Interface C141-E202-01EN 5-11 (8) Device/Head register (X’1F6’) The contents of this register indicate the device and the head number.

Interface 5-12 C141-E202-01EN - Bit 7: Busy (BSY) bit. This bit is set whenever the Command register is accessed. Then this bit is cleared when th

5.2 Logical Interface C141-E202-01EN 5-13 (10) Command register (X’1F7’) The Command register contains a command code being sent to the device. Af

C141-E202-01EN v Important Alert Items Important Alert Messages The important alert messages in this manual are as follows: A hazardous situatio

Interface 5-14 C141-E202-01EN (2) Device Control register (X’3F6’) The Device Control register contains device interrupt and software reset. Bit

5.3 Host Commands C141-E202-01EN 5-15 Table 5.3 Command code and parameters (1 of 2) COMMAND CODE（Bit） PARAMETER USED COMMAND NAME 7 6 5 4 3 2 1 0 F

Interface 5-16 C141-E202-01EN Table 5.3 Command code and parameters (2 of 2) COMMAND CODE（Bit） PARAMETER USED COMMAND NAME 7 6 5 4 3 2 1 0 FR SC SN

5.3 Host Commands C141-E202-01EN 5-17 Notes: FR: Features Register CY: Cylinder Registers SC: Sector Count Register DH: Drive/Head Register SN: Sec

Interface 5-18 C141-E202-01EN 5.3.2 Command descriptions The contents of the I/O registers to be necessary for issuing a command and the example in

5.3 Host Commands C141-E202-01EN 5-19 SC: Sector Count register x, xx: Do not care (no necessary to set) Note: 1. When the L bit is specified to

Interface 5-20 C141-E202-01EN (1) RECALIBRATE (X’10’ to X’1F’) This command performs the calibration. Upon receipt of this command, the device se

5.3 Host Commands C141-E202-01EN 5-21 (2) READ SECTOR(S) (X’20’ or X’21’) This command reads data of sectors specified in the Sector Count register

Interface 5-22 C141-E202-01EN (R: Retry) At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) x L x

5.3 Host Commands C141-E202-01EN 5-23 (3) READ LONG (X’22’ or X’23’) This command operates similarly to the READ SECTOR(S) command except that the