Fujitsu MB15C02 Bedienungsanleitung

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1
FUJITSU MICROELECTRONICS
DATA SHEET
DS04–21348–3Ea
Copyright©1999-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
1999.2
ASSP
Single Serial Input
PLL Frequency Synthesizer
On-Chip prescaler
MB15C02
DESCRIPTION
The Fujitsu Microelectronics MB15C02 is a serial input Phase Locked Loop (PLL) frequency synthesizer with a
prescaler. A 64/65 division is available for the prescaler that enables pulse swallow operation.
This operates with a supply voltage of 1.0 V (min.).
MB15C02 is suitable for mobile communications, such as paging systems.
FEATURES
High frequency operation: 220 MHz max @VDD = 1.0 V to 1.5 V
330 MHz max @V
DD = 1.2 V to 1.5 V
450 MHz max @V
DD = 1.3 V to 1.5 V
Single power supply : V
DD = 1.0 to 1.5 V
Power saving function
Pulse swallow function: 64/65
Serial input 14-bit programmable reference divider: R = 5 to 16,383
Serial input 18-bit programmable divider consisting of:
- Binary 6-bit swallow counter: 0 to 63
- Binary 12-bit programmable counter: 5 to 4,095
Wide operating temperature: Ta = –20 to 60°C
PACKAGES
16-pin, Plastic SSOP
(FPT-16P-M05)
20-pin, Plastic SSOP
(FPT-20P-M03)
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Inhaltsverzeichnis

Seite 1 - PLL Frequency Synthesizer

1FUJITSU MICROELECTRONICSDATA SHEETDS04–21348–3EaCopyright©1999-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved1999.2ASSPSingle Serial Input

Seite 2 - ■ PIN ASSIGNMENTS

10MB15C02(b) Charge pumpThe charge pump is available in two forms: internal external.Internal charge pump output (Do)External charge pump outputs (φR,

Seite 3 - ■ PIN DESCRIPTIONS

11MB15C02(d) Lock detectorThe lock detector detects the lock and unlock states of the PLL. The lock detector outputs “H” when the PLLenters the lock s

Seite 4 - SS – Ground pin

12MB15C024. Setting the Divide Ratio(1) Serial data formatThe format of the serial data is shown is Figure 3. The serial data is composed of a control

Seite 5 - ■ BLOCK DIAGRAM

13MB15C02(2) The flow of serial dataSerial data is received via data pin in synchronization with the clock input and loaded into shift register which

Seite 6 - ■ ABSOLUTE MAXIMUM RATINGS

14MB15C02(4) Setting the divide ratio for the programmable reference dividerColumns R0-R13 of Table 3 represent the divide ratio of the programmable r

Seite 7 - ■ ELECTRICAL CHARACTERISTICS

15MB15C02Since the divide rations are unpredictable when the MB15C02 is turned on, it is necessary to initialize the divideratio for both dividers at

Seite 8 - 2. Circuit Description

16MB15C02 TYPICAL CHARACTERISTICS1. fin Input Sensitivity2. OSCIN Input SensitivityInput sensitivity (dBm)20.010.00.0−10.0−20.0−30.0−40.0−50.0−60.00

Seite 9 - (4) Phase comparator

17MB15C023. fin Power Supply Voltage4. OSCIN Power Supply VoltageInput frequency (MHz)(MHz)100090080070060050040030020010000.9 1.0 1.1 1.2 1.3 1.4 1.6

Seite 10 - (b) Charge pump

18MB15C025. IDD Power Supply Current5.04.54.03.53.02.52.01.51.00.50.0I DD (mA)Input frequency vs. power supply currentTa = +25°C0 100 200 300 400 500

Seite 11 - (d) Lock detector

19MB15C026. Do (Charge Pump) Power Supply Voltage5.04.54.03.53.02.52.01.51.00.50.00.8 0.9 1.0 1.1 1.2 1.3 1.5 1.6 1.7 1.8V DD (V p) vs. I OL(at V OL =

Seite 12 - 4. Setting the Divide Ratio

2MB15C02 PIN ASSIGNMENTS To p12345616151413121178109ViewVDDVSSDataLEClockfinOSCINOSCOUTTESTFCLDDoφPVpPSNCNC17181920φRNCNC(FPT-20P-M03)To p1234561615

Seite 13 - (2) The flow of serial data

20MB15C027. Spectrum Wave FormATTEN 10 dBRL 0 dBmUAUG 16 10dB/∆MKR −85.50 dB25.0 kHzCENTER 286.0000 MHz*RBW 1.0 kHz VBW 1.0 kHzSPAN 200.0 kHz*SWP 1.

Seite 14 - (5) Setting data input timing

21MB15C028. Lock Up Time(Continued)∆MKr A euts N/Ax : 3.99999984 msy : −4.00100 MHz286.0050MHz2.00kHz/div285.9950MHz0 s 10.0000000 ms4.00 ms∆MKr A

Seite 15

22MB15C02(Continued) USAGE PRECAUTIONS• This device should be transported and stored in anti-static containers.• This is a static-sensitive device; t

Seite 16 - ■ TYPICAL CHARACTERISTICS

23MB15C02 PACKAGE DIMENSIONS(Continued)+0.20–0.10+.008–.004+0.10–0.05+.004–.002+0.05–0.02+.002–.001INDEX"A"0.10(.004)1.25.0490.22.0090.15.0

Seite 17 - IN Power Supply Voltage

24MB15C02(Continued)+0.20–0.10+.008–.004+0.10–0.05+.004–.002+0.05–0.02+.002–.001INDEX"A"0.10(.004)1.25.0490.22.0090.15.006(.0256±.0047)*(.17

Seite 19

26MB15C02MEMO

Seite 21

FUJITSU MICROELECTRONICS LIMITEDShinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,Tokyo 163-0722, Japan Tel: +81-3-5322-334

Seite 22 - ■ ORDERING INFORMATION

3MB15C02 PIN DESCRIPTIONS (Continued)Pin no.Pin nameI/O DescriptionsSSOP16SSOP201 1 VDD – Power supply voltage2 2 Clock IClock input for the shift re

Seite 23 - ■ PACKAGE DIMENSIONS

4MB15C02(Continued)Pin no.Pin nameI/O DescriptionsSSOP16SSOP2014 17 OSCOUT OOscillator output.Connection for an external crystal.– 18 NC – No connecti

Seite 24 - 20 pins, Plastic SSOP

5MB15C02 BLOCK DIAGRAM ControlregisterPhasecomparatorOSCINOSCOUTVPDo14-bit latchProgrammablereference dividerBinary 14-bitreference counterData18-bi

Seite 25

6MB15C02 ABSOLUTE MAXIMUM RATINGS WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,temperature,

Seite 26

7MB15C02 ELECTRICAL CHARACTERISTICS(For 220 MHz :VDD = Vp = 1.0 to 1.5 V, Ta = –20 to +60°C)(For 330 MHz :VDD = Vp = 1.2 to 1.5 V, Ta = –20 to +60°C)

Seite 27

8MB15C02 FUNCTION DESCRIPTIONS1. Pulse Swallow FunctionThe divide ratio can be calculated using the following equation:fVCO = [(M × N) + A] × fOSC ÷

Seite 28

9MB15C02Divide ratio range:Prescaler : M = 64, M+1=65Swallow counter : A = 0 to 63Programmable counter : N = 5 to 4095The MB15C02 uses the pulse swa

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